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  • Q&A#10 RAM Parallelism

    Q&A#10 RAM Parallelism
    May 18 2019
    How I can parallelize a RAM in FPGA

    https://surf-vhdl.com/how-to-implement-a-multi-port-memory-on-fpga/


    Website
    https://surf-vhdl.com

    Telegram channel
    https://t.me/SurfVhdl

    You can contact me
    mail: podcast@surf-vhdl.com

    Telegram:
    https://t.me/francesco_surfvhdl

    Teachable courses
    https://surf-vhdl.link/courses
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    4 Min.
  • ep#22-Multiplier optimization

    ep#22-Multiplier optimization
    May 13 2019
    Learn how to optimize a multiplier in particular cases:

    For a technical analysis go to the post:

    https://surf-vhdl.link/OptimizationVhdl12b25


    Website
    https://surf-vhdl.com

    Telegram channel
    https://t.me/SurfVhdl

    You can contact me
    mail: podcast@surf-vhdl.com

    Telegram:
    https://t.me/francesco_surfvhdl

    Teachable courses
    https://surf-vhdl.link/courses
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    5 Min.
  • Ep#21-Serial-to-Parallel Parallel-to-Serial converter

    Ep#21-Serial-to-Parallel Parallel-to-Serial converter
    Apr 28 2019
    Link to the post:
    https://surf-vhdl.link/99990


    Website
    https://surf-vhdl.com

    Telegram channel
    https://t.me/SurfVhdl

    You can contact me
    mail: podcast@surf-vhdl.com

    Telegram:
    https://t.me/francesco_surfvhdl

    Teachable courses
    https://surf-vhdl.link/courses

    Music by Francis Preve - https://www.francispreve.com
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    7 Min.
  • Q&A#09-I need a clock!

    Q&A#09-I need a clock!
    Apr 23 2019
    In this podcast we will understand how to connect a clock signal to our FPGA


    Website
    https://surf-vhdl.com

    Telegram channel
    https://t.me/SurfVhdl

    You can contact me
    mail: podcast@surf-vhdl.com

    Telegram:
    https://t.me/francesco_surfvhdl

    Teachable courses
    https://surf-vhdl.link/courses
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    9 Min.
  • Q&A#08- What is the dithering

    Q&A#08- What is the dithering
    Apr 10 2019
    What is dithering?
    Where we can use this technique?

    Website
    https://surf-vhdl.com

    Telegram channel
    https://t.me/SurfVhdl

    You can contact me
    mail: podcast@surf-vhdl.com

    Telegram:
    https://t.me/francesco_surfvhdl

    Teachable courses
    https://surf-vhdl.link/courses

    Music by Francis Preve - https://www.francispreve.com
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    5 Min.
  • ep#20-VHDL Generic

    ep#20-VHDL Generic
    Apr 6 2019
    VHDL Generic


    Website
    https://surf-vhdl.com

    Telegram channel
    https://t.me/SurfVhdl

    You can contact me
    mail: podcast@surf-vhdl.com

    Telegram:
    https://t.me/francesco_surfvhdl

    Teachable courses
    https://surf-vhdl.link/courses

    Music by Francis Preve - https://www.francispreve.com
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    6 Min.
  • Ep#19-Iterative statement

    Ep#19-Iterative statement
    Mar 22 2019
    Even if the VHDL is not a software language, we can find a tyoica SW statement, the iterative statement. Let’s see how to use this

    https://t.me/SurfVhdl/92

    Website
    https://surf-vhdl.com

    Telegram channel
    https://t.me/SurfVhdl

    You can contact me
    mail: podcast@surf-vhdl.com

    Telegram:
    https://t.me/francesco_surfvhdl

    Teachable courses
    https://surf-vhdl.link/courses

    Music by Francis Preve - https://www.francispreve.com
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    5 Min.
  • Ep#18-the conditional assignment in VHDL

    Ep#18-the conditional assignment in VHDL
    Mar 18 2019
    Let’s understand how to implement a conditional statement in VHDL
    image for the episode

    http://t.me/SurfVhdl/86


    Website
    https://surf-vhdl.com

    Telegram channel
    https://t.me/SurfVhdl

    You can contact me
    mail: podcast@surf-vhdl.com

    Telegram:
    https://t.me/francesco_surfvhdl

    Teachable courses
    https://surf-vhdl.link/courses

    Music by Francis Preve - https://www.francispreve.com
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    7 Min.